:: commit a29da577b87491738dde93f40c44eac8490d5356

Mintsuki <mintsuki@protonmail.com> — 2026-02-08 14:37

parents: 3a609b166a

protos/limine: Fix TCR_EL1 shareability comments to match actual values

diff --git a/common/protos/limine.c b/common/protos/limine.c
index e2f36297..993d72bb 100644
--- a/common/protos/limine.c
+++ b/common/protos/limine.c
@@ -292,12 +292,12 @@ extern symbol limine_spinup_32;
 
 #define LIMINE_TCR(tsz, pa) ( ((uint64_t)(pa) << 32)         /* Intermediate address size */  \
                             | ((uint64_t)2 << 30)            /* TTBR1 4K granule */           \
-                            | ((uint64_t)2 << 28)            /* TTBR1 Inner shareable */      \
+                            | ((uint64_t)2 << 28)            /* TTBR1 Outer shareable */      \
                             | ((uint64_t)1 << 26)            /* TTBR1 Outer WB RW-Allocate */ \
                             | ((uint64_t)1 << 24)            /* TTBR1 Inner WB RW-Allocate */ \
                             | ((uint64_t)(tsz) << 16)        /* Address bits in TTBR1 */      \
                                                              /* TTBR0 4K granule */           \
-                            | ((uint64_t)2 << 12)            /* TTBR0 Inner shareable */      \
+                            | ((uint64_t)2 << 12)            /* TTBR0 Outer shareable */      \
                             | ((uint64_t)1 << 10)            /* TTBR0 Outer WB RW-Allocate */ \
                             | ((uint64_t)1 << 8)             /* TTBR0 Inner WB RW-Allocate */ \
                             | ((uint64_t)(tsz) << 0))        /* Address bits in TTBR0 */
tab: 248 wrap: offon