spinup.asm_riscv64 1.1 KB raw

​
.section .text
​
.global riscv_spinup
riscv_spinup:
.option norelax
        li      t0, (2 << 32)
        csrw    sstatus, t0
        csrw    sie, zero
​
        lla     t0, 0f
        add     t0, t0, a3
        csrw    stvec, t0
        csrw    satp, a2
        sfence.vma
        unimp
.align 4
0:
        csrw    stvec, zero
​
        mv      t0, a0
        mv      sp, a1
​
        mv      a0, zero
        mv      a1, zero
        mv      a2, zero
        mv      a3, zero
        mv      a4, zero
        mv      a5, zero
        mv      a6, zero
        mv      a7, zero
        mv      s0, zero
        mv      s1, zero
        mv      s2, zero
        mv      s3, zero
        mv      s4, zero
        mv      s5, zero
        mv      s6, zero
        mv      s7, zero
        mv      s8, zero
        mv      s9, zero
        mv      s10, zero
        mv      s11, zero
        mv      t1, zero
        mv      t2, zero
        mv      t3, zero
        mv      t4, zero
        mv      t5, zero
        mv      t6, zero
        mv      tp, zero
        mv      gp, zero
        mv      ra, zero
​
        jr      t0
​
.section .note.GNU-stack,"",%progbits

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1
2	.section .text
3
4	.global riscv_spinup
5	riscv_spinup:
6	.option norelax
7	li t0, (2 << 32)
8	csrw sstatus, t0
9	csrw sie, zero
10
11	lla t0, 0f
12	add t0, t0, a3
13	csrw stvec, t0
14	csrw satp, a2
15	sfence.vma
16	unimp
17	.align 4
18	0:
19	csrw stvec, zero
20
21	mv t0, a0
22	mv sp, a1
23
24	mv a0, zero
25	mv a1, zero
26	mv a2, zero
27	mv a3, zero
28	mv a4, zero
29	mv a5, zero
30	mv a6, zero
31	mv a7, zero
32	mv s0, zero
33	mv s1, zero
34	mv s2, zero
35	mv s3, zero
36	mv s4, zero
37	mv s5, zero
38	mv s6, zero
39	mv s7, zero
40	mv s8, zero
41	mv s9, zero
42	mv s10, zero
43	mv s11, zero
44	mv t1, zero
45	mv t2, zero
46	mv t3, zero
47	mv t4, zero
48	mv t5, zero
49	mv t6, zero
50	mv tp, zero
51	mv gp, zero
52	mv ra, zero
53
54	jr t0
55
56	.section .note.GNU-stack,"",%progbits