:: commit 81c5dc1b7ea8c72ff4c67fcf45bc8073056b0722

Mintsuki <mintsuki@protonmail.com> — 2026-03-16 09:22

parents: 617267f13b

protos/limine: Tighten riscv64 machine state to match spec

diff --git a/common/lib/spinup.asm_riscv64 b/common/lib/spinup.asm_riscv64
index 8e964ee3..6a0692bf 100644
--- a/common/lib/spinup.asm_riscv64
+++ b/common/lib/spinup.asm_riscv64
@@ -4,7 +4,8 @@
 .global riscv_spinup
 riscv_spinup:
 .option norelax
-        csrci   sstatus, 0x2
+        li      t0, (2 << 32)
+        csrw    sstatus, t0
         csrw    sie, zero
 
         lla     t0, 0f
diff --git a/common/sys/smp_trampoline.asm_riscv64 b/common/sys/smp_trampoline.asm_riscv64
index c2749c34..35b27a9b 100644
--- a/common/sys/smp_trampoline.asm_riscv64
+++ b/common/sys/smp_trampoline.asm_riscv64
@@ -67,6 +67,8 @@ smp_trampoline_start:
         mv      tp, zero
         mv      ra, zero
 
+        li      t0, (2 << 32)
+        csrw    sstatus, t0
         csrw    sie, zero
         csrw    stvec, zero
 
tab: 248 wrap: offon