riscv64: Use rdcycle instead of rdtime for rdtsc(); add delay to SMP startup like 530e28e846c1d473cd9e0b615575394f369b80e1
diff --git a/common/sys/cpu.h b/common/sys/cpu.h
index dbe3807f..2ea89c54 100644
--- a/common/sys/cpu.h
+++ b/common/sys/cpu.h
@@ -160,12 +160,6 @@ static inline uint64_t rdtsc(void) {
return ((uint64_t)edx << 32) | eax;
}
-static inline void delay(uint64_t cycles) {
- uint64_t next_stop = rdtsc() + cycles;
-
- while (rdtsc() < next_stop);
-}
-
#define rdrand(type) ({ \
type rdrand__ret; \
asm volatile ( \
@@ -227,12 +221,6 @@ static inline uint64_t rdtsc(void) {
return v;
}
-static inline void delay(uint64_t cycles) {
- uint64_t next_stop = rdtsc() + cycles;
-
- while (rdtsc() < next_stop);
-}
-
#define locked_read(var) ({ \
typeof(*var) locked_read__ret = 0; \
asm volatile ( \
@@ -297,7 +285,7 @@ static inline int current_el(void) {
static inline uint64_t rdtsc(void) {
uint64_t v;
- asm ("rdtime %0" : "=r"(v));
+ asm volatile ("rdcycle %0" : "=r"(v));
return v;
}
@@ -364,4 +352,10 @@ static inline uint64_t rdtsc(void) {
#error Unknown architecture
#endif
+static inline void delay(uint64_t cycles) {
+ uint64_t next_stop = rdtsc() + cycles;
+
+ while (rdtsc() < next_stop);
+}
+
#endif
diff --git a/common/sys/smp.c b/common/sys/smp.c
index 43666b45..072b6667 100644
--- a/common/sys/smp.c
+++ b/common/sys/smp.c
@@ -749,6 +749,8 @@ static bool smp_start_ap(size_t hartid, size_t satp, struct limine_smp_info *inf
for (int i = 0; i < 1000000; i++) {
if (locked_read(&passed_info.smp_tpl_booted_flag) == 1)
return true;
+
+ delay(100000);
}
return false;
@@ -763,9 +765,6 @@ struct limine_smp_info *init_smp(size_t *cpu_count, pagemap_t pagemap, uint64_t
}
struct limine_smp_info *ret = ext_mem_alloc(num_cpus * sizeof(struct limine_smp_info));
- if (ret == NULL) {
- panic(false, "out of memory");
- }
*cpu_count = 0;
for (struct riscv_hart *hart = hart_list; hart != NULL; hart = hart->next) {
