:: commit 3de2394f23f48d7c456e063824c96fec9d8d56f2

diff --git a/Makefile b/Makefile
index d7ad1d6c..392b7845 100644
--- a/Makefile
+++ b/Makefile
@@ -4,7 +4,7 @@ LD = ld
 CFLAGS = -O2 -pipe -Wall -Wextra
 
 INTERNAL_CFLAGS = \
-	-m16 \
+	-m32 \
 	-ffreestanding \
 	-nostdlib \
 	-masm=intel \
diff --git a/bootsect/bootsect.asm b/bootsect/bootsect.asm
index d9668a1b..fad8ba73 100644
--- a/bootsect/bootsect.asm
+++ b/bootsect/bootsect.asm
@@ -64,12 +64,21 @@ dw 0xaa55
 
 ; ********************* Stage 2 *********************
 
-; ***** A20 *****
+; Load stage 3
+
+mov ax, 2
+mov ebx, 0x8000
+mov cx, 6
+call read_sectors
+
+jc err
+
+; Enable A20
 
 call enable_a20
 jc err
 
-; Enable 4GiB limits
+; Enter 32 bit pmode
 
 lgdt [GDT]						; Load the GDT
 
@@ -79,44 +88,20 @@ mov eax, cr0
 or eax, 00000001b
 mov cr0, eax
 
-jmp 0x08:.pmodeu
+jmp 0x18:.pmode
 
-.pmodeu:
+bits 32
+.pmode:
 
-mov ax, 0x10
+mov ax, 0x20
 mov ds, ax
 mov es, ax
 mov fs, ax
 mov gs, ax
 mov ss, ax
 
-mov eax, cr0
-and eax, 11111110b
-mov cr0, eax
-
-jmp 0x0000:.unreal_mode
-
-.unreal_mode:
-
-xor ax, ax
-mov ds, ax
-mov es, ax
-mov fs, ax
-mov gs, ax
-mov ss, ax
-
-sti
-
-; Load stage 3
-
-mov ax, 2
-mov ebx, 0x8000
-mov cx, 6
-call read_sectors
-
-jc err
-
 jmp 0x8000
+bits 16
 
 %include 'a20_enabler.inc'
 %include 'gdt.inc'