:: commit 21d3d7f3f2a367537a8c0cf54694f49450ff4256

diff --git a/common/sys/lapic.h b/common/sys/lapic.h
index 0f2cbac7..17996752 100644
--- a/common/sys/lapic.h
+++ b/common/sys/lapic.h
@@ -9,6 +9,7 @@
 #define LAPIC_REG_ICR1     0x310
 #define LAPIC_REG_SPURIOUS 0x0f0
 #define LAPIC_REG_EOI      0x0b0
+#define LAPIC_REG_ID       0x020
 
 bool lapic_check(void);
 void lapic_eoi(void);
diff --git a/common/sys/smp.c b/common/sys/smp.c
index 072b6667..f02f8f77 100644
--- a/common/sys/smp.c
+++ b/common/sys/smp.c
@@ -121,28 +121,16 @@ struct limine_smp_info *init_smp(size_t   *cpu_count,
 
     struct gdtr gdtr = gdt;
 
-    uint32_t eax, ebx, ecx, edx;
-
-    if (!cpuid(1, 0, &eax, &ebx, &ecx, &edx))
-        return NULL;
-
-    uint8_t bsp_lapic_id = ebx >> 24;
+    uint8_t bsp_lapic_id = lapic_read(LAPIC_REG_ID) >> 24;
+    *_bsp_lapic_id = bsp_lapic_id;
 
     x2apic = x2apic && x2apic_enable();
 
-    uint32_t bsp_x2apic_id = 0;
-    if (x2apic) {
-        // The Intel manual recommends checking if leaf 0x1f exists first, and
-        // using that in place of 0xb if that's the case
-        if (!cpuid(0x1f, 0, &eax, &ebx, &ecx, &edx))
-            if (!cpuid(0xb, 0, &eax, &ebx, &ecx, &edx))
-                return NULL;
-
-        bsp_x2apic_id = edx;
+    uint32_t bsp_x2apic_id = bsp_lapic_id;
 
+    if (x2apic) {
+        bsp_x2apic_id = x2apic_read(LAPIC_REG_ID);
         *_bsp_lapic_id = bsp_x2apic_id;
-    } else {
-        *_bsp_lapic_id = bsp_lapic_id;
     }
 
     *cpu_count = 0;